Principal Electrical Engineer at Renesas Electronics in San Jose, CALIFORNIA, United States

Job description

• We are seeking an experienced Principal Process Technology Engineer to provide technical leadership in semiconductor device and process technology development and product enablement. This role will collaborate with foundry partners and Design, Product Engineering, Reliability, Packaging, and Operations teams to ensure successful product tape-outs and production ramps.
• The ideal candidate has deep expertise in semiconductor device physics, process and device development, and characterization, and can translate technology capabilities and limitations into practical guidance for circuit and product development.

Responsibilities

• Serve as the technical interface with foundry partners, driving device and process development, qualification, reliability, and continuous improvement.
• Lead device and modeling test-chip tape-outs, characterization, and analysis.
• Lead risk-reduction and enablement activities for new technologies and product development.
• Drive collaboration across Design, Product Engineering, Packaging, Reliability, and Operations teams.
• Provide technical guidance to design teams throughout development and tape-out.
• Benchmark technology platforms for competitiveness and alignment with product and business requirements.

Requirements

• MS or PhD in Electrical Engineering, Physics, Materials Science, or a related field, with 10+ years of semiconductor industry experience.
• Strong understanding of CMOS and BCD process integration, device physics, and reliability.
• Extensive experience working with semiconductor foundries and BCD technologies; advanced-node experience is a plus.
• Experience with PDKs, SPICE models, and device simulation.
• Experience with device and modeling test-chip tape-outs and characterization using semiconductor parameter analyzers, power device analyzers, and TLP systems.
• Excellent cross-functional communication skills, with a proven ability to align stakeholders and resolve complex technical challenges.

Skills

Required

• CMOS and BCD process integration
• Device physics
• Reliability
• PDKs
• SPICE models
• Device simulation
• Semiconductor parameter analyzers
• Power device analyzers
• TLP systems
• Cross-functional communication
• Stakeholder alignment
• Technical problem solving

Preferred

• Advanced-node experience

Benefits

• The expected annual pay range for this position is $198K-$245K. This position is also eligible for bonus opportunities. Please note that final offer amount will be dependent on geographic location, applicable experience, and skillset of the candidate. we put in the additional information